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XC2C32 CoolRunner-II CPLD U6
The ML555 board cannot margin any of the oncard power supplies. Other Xilinx boards
have power supply monitoring and margining capabilities for application-specific
functions, such as memory interfaces and LVDS interfaces. Characterization boards are
available for GTP transceiver characterization.
ML555 Board Physical Dimensions
The physical height of the ML555 board prevents the system unit covers from being used.
The ML555 board should only be used in a development environment. The ML555 board is
4.7 inches high by 10.5 inches long.
XC2C32 CoolRunner-II CPLD U6
This CPLD supports static or dynamic reconfiguration of the FPGA design image. A
default design image for the CPLD is provided with the ML555 board to support static
reconfiguration. To select one of four designs, the user configures the P3 configuration
image select header and then either powers up the board, or depresses and releases the
PROG switch while the board is in a system unit. The design image might require the
board to be plugged into either a parallel PCI bus system board slot or a serial PCI Express
system board slot.
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U1 and U15: XCF32PFSG48C Platform Flash configuration devices
U10: XC5VLX50T FPGA Bank 20
U10: XC5VLX50T FPGA Bank 0 Configuration Interface
P3: Configuration Image select header
SW6 (PROG), SW7: General-purpose pushbutton switches
includes more details concerning the ML555 board configuration.
Virtex-5 FPGA ML555 Development Kit
UG201 (v1.4) March 10, 2008
85
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相关PDF资料
HW-V5-ML561-UNI-G
EVALUATION PLATFORM VIRTEX-5
I-JET
JTAG ARM DEBUGGING PROBE
IAC24A
INPUT MODULE AC 5MA 24VDC
IAC5EQ
INPUT MODULE AC 10MA 5VDC
IB8RM
SURGE SUPP 8OUT 12'CORD W/REMOTE
IBAR12-20T
SURGE SUPPRSSR 20A 12OUT RACKMNT
IBAR12/20ULTRA
SURGE SUPPRSSR 20A 12OUT RACKMNT
IBAR12ULTRA
SURGE SUPPRSSR 15A 12OUT RACKMNT
相关代理商/技术参数
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功能描述:可编程逻辑 IC 开发工具 Lattice Video Interface Kit
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HW-VL1
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HW-VL2
制造商:IDEC Corporation 功能描述:COVER;HW FNGR SAFE CONTAC CVR 制造商:IDEC CORPORATION 功能描述:HW FNGR SAFE CONTAC CVR
HW-VL3
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